覆晶封裝之微波電性分析

The Electrical Characteristics of Flip-Chip Package at Microwave Frequency

指導教授 : 黃榮堂、施勝雄   研究生 : 鄧志勇  機電整合研究所 90年


摘要

  覆晶封裝技術為近來頗受重視之封裝技術之一,因此,已有非常多的學者投入覆晶凸塊之可靠度與散熱等領域作研究分析,然而對於電性效能上的研究卻未十分的受到重視。
本研究是以0 GHz至 60 GHz的頻率範圍,分析以覆晶凸塊作為連結上、下基板之訊號傳輸結構。分析和呈現不同覆晶凸塊形狀與對位不精準而產生的傳輸線重疊長度對訊號傳輸上的影響。由結果可知,不同覆晶凸塊形狀與對位不精準而產生的傳輸線重疊長度對訊號傳輸上扮演著舉足輕重的角色。
在本論文中,以 Zeland’s IE3D模擬結果得到S、Y參數與等效電路,來作為分析之主要工具。由S參數來觀察整體傳輸之頻率範圍,Y參數與等效電路主要是用來計算推導R、L、C元件值,藉由以上結果與相對應之設計來觀察覆晶凸塊形狀與對位精確度的關係。
最後,我們總結如何運用覆晶凸塊形狀來達成一工作頻率範圍中之最小訊號損失、最大之重疊長度容認度的最佳化,藉以來減少因對位所產生之訊號傳輸反射程度的影響。

ABSTRACT

  Recently, Flip-chip(FC) package technology turns into an important package technology. More and more scholars have studied in reliable and heat transferred fields of the FC bump interconnect, however, the research of electrical characteristics of a FC Bump interconnect is not taken more attention.
In this paper a coplanar waveguide(CPW)on substrate connected by a FC bump with the other CPW is analyzed in the frequency range of 1 GHz to 60 GHz. The electrical characteristics of various FC bump dimensions and length of the overlap of the CPW on the substrate caused by inaccurate alignment are presented and analyzed. Base on the simulation with Zeland’s IE3D simulation software, we concluded that various FC bump dimensions and length of overlap by inaccurate alignment play an important role in the electrical characteristics of the FC bump interconnection.
In this thesis, S,Y parameters and equivalent circuit obtained by Zeland’s IE3D simulation software are regarded as the main parameters for analysis. The frequency band was obtained by observing the S parameters, R,L,C values could be obtained by Y parameters and equivalent circuit. From the result above, the relation of FC bump dimensions and alignment accuracy could be obtained.
Finally, we summarize how to achieve minimum signal loss with maximum overlap length by FC dimensions in order to reduce the effect of signal transmission reflection caused by inaccurate alignment.