E 類功率放大器於射頻電路之 分析與應用

Analysis and Application of Class E power Amplifier on Radio Frequency Circuits

指導教授 : 黃榮堂    研究生 : 顏宏霖 機電整合研究所 89年


摘要

  本研究是以TSMC 0.35 1P4M CMOS製程來設計開關式E類射頻功率放大器,在給定放大器的設計規格(輸出功率,工作頻率,直流電壓,輸出諧振電路負載Q值)之下,可求出電路中被動元件值,並配合國科會晶片中心所提供的高頻大訊號模型參數來進行分析以及公式推導,進一步求得輸入功率,輸出功率,直流功率、附加功率效率、汲極效率、功率增益等相對於電晶體單位指叉個數的關係式,接著並以HSPICE軟體模擬驗證推導公式的正確性,對E類射頻功率放大器的設計著而言,由本研究推導出的關係式,可求出符合規格的功率及效能指標,並決定電晶體最佳尺寸大小,減少進行模擬時嘗試錯誤的機會。本研究模擬的放大器案例,其操作頻率在900MHz,輸出功率30dBm,負載Q值2,直流電壓2.5V。
此外,為了符合多頻的需求,嘗試著將E類功率放大器設計在900MHZ、1.8GHZ、2.4GHz頻段。不使用三組個別的Class E放大器硬體線路,而是改變原有單一放大器線路,使其操作在上述三個頻段,提出以pMOS電容選擇頻率的方式來選擇不同頻率之下的電容,使電路操作在所想要的頻率,經過HSPICE軟體驗證,證實本研究提出的電路與個別頻段設計的電路相比較,不但附加功率效率降低有限,而且所需的元件與晶片面積可大幅減少。以此結構操作在上述三個頻段是可行的。

關鍵詞:開關式、E類射頻功率放大器、附加功率效率、汲極效率、功率增益、多頻。

ABSTRACT

  In this research, we design and analyze a switched Class-E power amplifier, based on standard TSMC 1p4m 0.35 digital CMOS process. Given the design specifications of the Class-E output network (output power, frequency, dc voltage, and loaded Q of the output resonator), passive components of the circuit can be evaluated and based on high frequency and large signal model parameters supplied by CIC. Through analysis and formula derivation, we can obtain related expressions for input power, output power, dc power, power-added efficiency, drain efficiency, and power gain versus unit gate fingers of transistor. Then we verify the validity of the derived formula by comparing our computed values against those from HSPICE simulations. For designer of Class-E power amplifier, using the derived formula, efficiency and performance can satisfy the desired specifications and the optimal FET aspect ration can be determined. Try and error cycle can be reduced on simulation process. The amplifier design example operate at 900 MHz and provide 30 dBm of output power from a single 2.5V supply, and loaded Q of the output resonator of 2. In addition, in order to cohere with multi-frequency demand, we attempt to design Class-E power amplifier that operated at 900MHz/1.8GHz/2.4GHz frequency. The circuit will not need to use three individual Class-E power amplifiers. Altering original single amplifier structure to operate at three frequencies, we propose pMOS capacitor method to select capacitor at different frequency. This circuit can be operated at desired frequency and is verified by HSPICE to compare original single and our proposed amplifier. There is little degradation on PAE, but also components and chip size fall off a lot. The architectures success to operate at above three frequency。