論文名稱: 內建於PZT壓電感測器之積體電荷放大器
[摘要]
壓電材質鋯鈦酸鉛(PZT)一直是力量感測器中感測端的重要元件,其壓電的特性也造成了
後端處理電路的複雜性。而處理壓電特性的訊號處理電路-電荷放大器(Charge
Amplifier),大都是採用電壓式運算放大器為主的處理方法。有關市面上電荷放大器的設
計KISTLER公司皆有成品開發但因其所設計的面積較大皆不適於封裝於壓力感測器之內部,
所以就藉由財團法人國家晶片系統設計中心依其下線製作符合封裝於感測器內部之積體電
路晶片,因此目標朝向於將晶片封裝於感測器內部來達成體積小,有效率的壓電感測器。
對於感測器裝配於射出成型機內部其電路則需要考量在內部溫度變化而造成目標值的不確
定性,所以提出利用能帶能隙參考電路來改善因溫度變化所造成的影響,並且依所設計之
電路來佈局驗證並且下線製作,有關訊號處理電路的分析設計,是利用HSPICE來模擬並驗
證其在低雜訊、低功率、高頻寬的特性。而晶片製作是採用TSMC 0.35um 1P4M的製程參數

 
[摘要]
Lead-zirconate-titanate (PZT) is always a significant component of force-
sensing device, and it,s piezoelectric characteristic also complicates the
readout processing circuit. Charge amplifier is the main method of voltage
model operation amplifiers. There are lots of products developed on related
market (KISTLER), but most of those product’s chip areas are too large and
too difficult to be packaged on the sensor. Thus, by using the design rules of
CIC, we hope can design and tape out the suitable chips, which could be well
fitted to all the processing and packaging conditions. Because the temperature
dependences and modulations of designed sensor always do huge distortion on
the ideal value, we propose a bandgap reference circuit to improve device
temperature-dependent affects and verifies our design circuit. The analyses of
our signal processing circuit are simulated and verified by HSPICE and it’s
simulate manufacture of is based on TSMC 0.35 um 1P4M processing parameters.

 
[論文目次]
中文摘要 i
英文摘要 ii
誌謝 iii
目錄 iv
表目錄 vii
圖目錄 viii
第一章 緒論 1
1.1 研究背景 1
1.2 研究動機 2
1.3 論文架構 3
第二章 電荷放大器之原理及文獻回顧 4
2.1 簡介 4
2.2 壓電元件操作原理與模型 5
2.3 訊號處理電路 8
2.4 電荷放大器的原理與問題 9
2.5 改善開關雜訊問題的方法 11
2.6 低阻抗電壓模式(LIVM) 14
2.7 結論 14
第三章 訊號處理電路之設計與製作 15
3.1 簡介 15
3.2 運算放大器設計 19
3.2.1 運算放大器設計之模擬結果 23
3.2.1.1 頻率響應 23
3.2.1.2 開迴路特性 24
3.2.1.3 暫態響應 25
3.3 輸出級設計 27
3.3.1 轉導放大器設計之模擬結果 31
3.3.1.1 頻率響應 31
3.3.1.2 開迴路特性 32
3.3.1.3 暫態分析 33
3.3.2 輸出級設計之模擬結果 34
3.3.2.1 頻率響應 34
3.3.2.2開迴路特性 35
3.3.2.3暫態分析 36
3.4 偏壓電路設計 36
3.4.1 啟動電路考量 40
3.4.2 偏壓電路模擬 42
3.5 差動放大器設計 44
3.5.1 差動放大器電路模擬 45
3.5.1.1 頻率響應 45
3.5.1.2 暫態響應 46
3.5.1.3 失真考量 47
3.6 電荷放大器設計 47
3.5.1 電荷放大器電路模擬 49
第四章 製作量測與討論 53
4.1 積體電路流程及佈局考量 53
4.1.1 佈局考量 54
4.1.2 電阻佈局 54
4.1.3 電晶體差動對佈局 55
4.2 整體電路佈局 56
4.2.1 軌對軌摺疊放大器佈局 56
4.2.2 轉導放大器 57
4.2.3 輸出級電路佈局 57
4.2.4 偏壓電路佈局 59
4.2.5 整體電荷放大器佈局 61
4.3 電源供應考量 62
4.4 封裝設計考量 63
第五章 結論與展望 66
5.1 結論 66
5.2 未來展望 67
參考文獻 68

 
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